Huawei Ascend AI Chip Roadmap & System level performance data
Huawei's latest Ascend AI chip roadmap is breathtaking.
TL;DR: Huawei has further doubled down on optical+networking optimization to deliver node & cluster level superiority over Nvidia. On single chip basis, the incoming Ascend 950 reaches parity with Hopper. 960 will be on par with Blackwell. 970 targeting Rubin+ perf.
Chip-level = Behind NVDA T-2
By 1Q26, Huawei will be shipping the next gen Ascend 950PR. 950PR’s compute die seems to be monolithic, as opposed to two compute die stitched together by MCM interposer. The goal is to achieve H100-like compute without the need to use two compute dies. Additionally, 950PR is dedicated for prefill and recommendation use cases which require larger but not necessarily faster memory. To achieve that, Huawei uses its own version of HBM named HiBL 1.0. In contrast, Nvidia’s incoming prefill-optimized Rubin CPX will only be available by late 2026, and it is based on GDDR not something similar to HiBL.
Subsequently, in 4Q26, 950DT for decoding and training will be available. It uses the same compute die with HiZQ 1.0 memory for high bandwidth use cases like decoding and training. Notably, the spec is almost the same as HBM3e, but it is likely that Huawei’s HiZQ doesn’t have the standard dimension size. It uses Huawei’s custom logic die as the base die to offer faster speed and less controller logic on compute die.
Ascend 960 will likely be the chiplet version of 950DT similar to Blackwelll vs. Hopper. Basically the compute and memory size will double, but memory bandwidth will increase slightly higher than 2x.
Ascend 970 is in planning phase but Huawei is ambitious about the roadmap and it wants to double major specs in order to maintain competitiveness against Nvidia.
System-level = NVDA T+3?
On the node-perspective, Huawei has discontinued naming the sclae-up wolrd as node but superpod. This is because it is not only packing 384 chips together but 8192 via high-speed optical interconnect and optimized networking protocols that will allow these chips to behave like one computer but likely not 100% matching the perf of the NV link sclae up perf as we know.
That said, the scale up domain under Huawei’s UnifiedBus 2.0 tech will have very high reliability and networking efficiency vs. scaleup+sclae-out used by Nvidia. Huawei claims to achieve 95% efficiency on 8k superpod vs. Nvidia's 3584 card superpod.
This is not impossible given Huawei’s massive leadership of the rest of the world in terms of optical communication and networking optimization. It simply controls everything and it is able to use customized specs and components to achieve it.
By using optical, Huawei avoids the hefty world of C2C via CoWoS like Blackwell or Rubin which packs 2/4 compute dies together. It is very likely that Huawei will indeed maintain superpod and cluster-level performance superiority over the years to come.
As a result, while NVDA is confined in using chiplet and denser PCB designs to pack more compute dies in one rack, Huawei is able to link more racks together to form a superpod. For 950 Superpod, that’s 128 compute racks, 32 networking racks, totalling 160 racks and 1000m^2 in area size. For 960 Superpod, that’s 176 compute racks 44 networking rakcs totalling 220 racks occupying 2200m^2 in area size.
Compared to NVIDIA's NVL144, which is also set to launch in the second half of next year, the Atlas 950 Super Node Card is 56.8 times larger in scale, has 6.7 times the total computing power, and 15 times the memory capacity, reaching 1152TB; its interconnect bandwidth is 62 times higher, reaching 16.3PB/s. Even compared to NVIDIA's NVL576, planned for 2027, the Atlas 950 Super Node remains superior in all aspects.
Compared to Huawei’s previously launched Atlas 900 (CloudMatrix 384) supernode, the training performance of the Atlas 950 supernode has been improved by 17 times, reaching 4.91M TPS. By supporting the FP4 data format, the inference performance of the Atlas 950 supernode has increased by up to 26.5 times, reaching 19.6M TPS.
The Atlas 960 supernode further amplifies our advantages in AI supernodes. Based on Ascend 960, its total compute power, memory capacity, and interconnect bandwidth are doubled compared to the Atlas 950. Specifically, total FP8 compute power will reach 30 EFLOPS, while total FP4 compute power will reach 60 EFLOPS; memory capacity will reach 4,460 TB, and interconnect bandwidth will reach 34 PB/s. Compared to the Atlas 950 supernode, the performance of large model training and inference will be improved by more than 3 times and 4 times, respectively, reaching 15.9M TPS and 80.5M TPS.
With such a large scale-up superpod, it is obvious that Huawei’s cluster is able to reach a giant size easily.
The Atlas 950 SuperCluster consists of 64 interconnected Atlas 950 supernodes, integrating over 520,000 Ascend 950DT chips from more than 10,000 racks into a unified whole, delivering a total FP8 compute power of up to 524 EFLOPS. The launch date will coincide with that of the Atlas 950 supernode, which is the fourth quarter of 2026.
In terms of cluster networking, Huawei supports both UBoE and RoCE protocols. UBoE carries the UB protocol over Ethernet, allowing customers to leverage their existing Ethernet switches. Compared with traditional RoCE, UBoE networking offers lower static latency, higher reliability, and greater savings in both switches and optical modules. Therefore, Huawei recommends UBoE.
This is Huawei’s Atlas 950 SuperCluster. Compared to the current world’s largest cluster, xAI Colossus, it is 2.5 times larger in scale and 1.3 times more powerful—making it the undisputed most powerful compute cluster in the world! Whether for today’s mainstream hundred-billion-parameter dense or sparse large model training tasks, or future trillion- or hundred-trillion-parameter model training, the supernode cluster can serve as a robust compute foundation, efficiently and stably supporting continuous innovation in artificial intelligence.
Correspondingly, in the fourth quarter of 2027, Huawei will also launch the Atlas 960 SuperCluster, based on the Atlas 960 supernode, further expanding the cluster to the million-card level, with total FP8 compute power reaching 2 ZFLOPS and total FP4 compute power reaching 4 ZFLOPS. Like its predecessor, it supports both UBoE and RoCE protocols, and with the advantages of UBoE, its performance and reliability are further enhanced, with even lower static latency and greater network uptime, making UBoE networking highly recommended. Through the Atlas 960 SuperCluster, Huawei will continue to accelerate customer application innovation and explore new heights in intelligent capabilities.
Numbers aside, how far is it ahead or behind $NVDA?
On single die PPAC perspective, it seems 950DT (for decoding and training) will be quite close to Hopper/Blackwell.
On memory front, by using custom HBM standard whilst NVDA only customize the base die of HBM4, Huawei is ahead. But its sources of DRAM (Swaysure) is slightly behind in DRAM die.
In terms of networking, Huawei is massively ahead of NVDA thanks to Huawei's years of networking know-how and advanced vertical integration across all layers of optical networking.
Lastly, and most importantly, new Ascend chips now support SIMT to improve CUDA compatibility. All things considered, Huawei is now possibly the biggest contender to NVDA in merchant AI chips. Its 8k+ networking tech has been in testing for more than a year, and with iDUV solved, it is a matter of time when large frontier models will be trained on Ascend chips.
950 will be the first chip for Huawei after 910-series which was originally designed in 2019 and wasn’t planned to be used for LLM use cases like today. It will be an very interesting time to see how Huawei’s rearchitected and full optimized AI chip will be adopted by the Chinese companies in quarters to come.